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| ? 2010-2015 microchip technology inc. ds20002249b-page 1 mcp4802/4812/4822 features ? mcp4802: dual 8-bit voltage output dac ? mcp4812: dual 10-bit voltage output dac ? mcp4822: dual 12-bit voltage output dac ? rail-to-rail output ? spi interface with 20 mhz clock support ? simultaneous latching of the dual dacs with ldac pin ? fast settling time of 4.5 s ? selectable unity or 2x gain output ? 2.048v internal voltage reference ?50ppm/c v ref temperature coefficient ? 2.7v to 5.5v single-supply operation ? extended temperature range: -40c to +125c applications ? set point or offset trimming ? sensor calibration ? precision selectable voltage reference ? portable instrumentation (battery-powered) ? calibration of optical communication devices description the mcp4802/4812/4822 devices are dual 8-bit, 10-bit and 12-bit buffered voltage output digital-to-analog converters (dacs), respectively. the devices operate from a single 2.7v to 5.5v supply with spi compatible serial peripheral interface. the devices have a high precision internal voltage reference (v ref = 2.048v). the user can configure the full-scale range of the device to be 2.048v or 4.096v by setting the gain selection option bit (gain of 1 of 2). each dac channel can be operated in active or shutdown mode individually by setting the configuration register bits. in shutdown mode, most of the internal circuits in the shutdown channel are turned off for power savings and the output amplifier is configured to present a known high resistance output load (500 k ?? typical ? . the devices include double-buffered registers, allowing synchronous updates of two dac outputs using the ldac pin. these devices also incorporate a power-on reset (por) circuit to ensure reliable power- up. the devices utilize a resistive string architecture, with its inherent advantages of low dnl error, low ratio metric temperature coefficient and fast settling time. these devices are specified over the extended temperature range (+125c). the devices provide high accuracy and low noise performance for consumer and industrial applications where calibration or compensation of signals (such as temperature, pressure and humidity) are required. the mcp4802/4812/4822 devices are available in the pdip, soic and msop packages. package types related products (1) p/n dac resolution no. of channels voltage reference (v ref ) mcp4801 8 1 internal (2.048v) mcp4811 10 1 mcp4821 12 1 mcp4802 8 2 mcp4812 10 2 mcp4822 12 2 mcp4901 8 1 external mcp4911 10 1 mcp4921 12 1 MCP4902 8 2 mcp4912 10 2 mcp4922 12 2 note 1: the products listed here have similar ac/dc performances. mcp48x2 8-pin pdip, soic, msop 1 2 3 4 8 7 6 5 cs sck sdi v dd v ss v outa v outb ldac mcp4802 : 8-bit dual dac mcp4812 : 10-bit dual dac mcp4822 : 12-bit dual dac 8/10/12-bit dual voltage output digital-to-analog converter with internal v ref and spi interface
mcp4802/4812/4822 ds20002249b-page 2 ? 2010-2015 microchip technology inc. block diagram op amps v dd v ss cs sdi sck interface logic input register a register b input dac a register register dac b string dac b string dac a output power-on reset v outa v outb ldac output gain logic gain logic 2.048v v ref logic ? 2010-2015 microchip technology inc. ds20002249b-page 3 mcp4802/4812/4822 1.0 electrical characteristics absolute maximum ratings ? v dd ....................................................................... 6.5v all inputs and outputs .......... v ss ? 0.3v to v dd + 0.3v current at input pins ......................................... 2 ma current at supply pins .................................... 50 ma current at output pins .................................... 25 ma storage temperature .......................... -65c to +150c ambient temp. with power applied ..... -55c to +125c esd protection on all pins ?? 4 kv (hbm), ?? 400v (mm) maximum junction temperature (t j )................+150c ? notice: stresses above those listed under ?maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. electrical characteristics electrical specifications: unless otherwise indicated, v dd = 5v, v ss = 0v, v ref = 2.048v, output buffer gain (g) = 2x, r l = 5 k ? to gnd, c l = 100 pf, t a = -40 to +85c. typical values are at +25c. parameters sym min typ max units conditions power requirements input voltage v dd 2.7 ? 5.5 v input current i dd ? 415 750 a all digital inputs are grounded, all analog outputs (v out ) are unloaded. code = 0x000h software shutdown current i shdn_sw ?3.3 6 a power-on reset threshold v por ?2.0 ? v dc accuracy mcp4802 resolution n 8 ? ? bits inl error inl -1 0.125 1 lsb dnl dnl -0.5 0.1 +0.5 lsb note 1 mcp4812 resolution n 10 ? ? bits inl error inl -3.5 0.5 3.5 lsb dnl dnl -0.5 0.1 +0.5 lsb note 1 mcp4822 resolution n 12 ? ? bits inl error inl -12 2 12 lsb dnl dnl -0.75 0.2 +0.75 lsb note 1 offset error v os -1 0.02 1 % of fsr code = 0x000h offset error temperature coefficient v os /c ? 0.16 ? ppm/c -45c to +25c ? -0.44 ? ppm/c +25c to +85c gain error g e -2 -0.10 2 % of fsr code = 0xfffh, not including offset error gain error temperature coefficient ? g/c ? -3 ? ppm/c note 1: guaranteed monotonic by design over all codes. 2: this parameter is ensured by design, and not 100% tested. mcp4802/4812/4822 ds20002249b-page 4 ? 2010-2015 microchip technology inc. internal voltage reference (v ref ) internal reference voltage v ref 2.008 2.048 2.088 v v outa when g = 1x and code = 0xfffh temperature coefficient ( note 2 ) ? v ref /c ? 125 325 ppm/c -40c to 0c ? 0.25 0.65 lsb/c -40c to 0c ? 45 160 ppm/c 0c to +85c ? 0.09 0.32 lsb/c 0c to +85c output noise (v ref noise) e nref (0.1- 10 hz) ?290 ?v p-p code = 0xfffh, g = 1x output noise density e nref (1 khz) ?1.2 ?v/ ? hz code = 0xfffh, g = 1x e nref (10 khz) ?1.0 ?v/ ? hz code = 0xfffh, g = 1x 1/f corner frequency f corner ?400 ? hz output amplifier output swing v out ? 0.01 to v dd ? 0.04 ? v accuracy is better than 1 lsb for v out = 10 mv to (v dd ?40 mv) phase margin pm ? 66 ? degree () c l = 400 pf, r l = ? slew rate sr ? 0.55 ? v/s short circuit current i sc ?15 24ma settling time t settling ? 4.5 ? s within 1/2 lsb of final value from 1/4 to 3/4 full-scale range dynamic performance ( note 2 ) dac-to-dac crosstalk ? <10 ? nv-s major code transition glitch ? 45 ? nv-s 1 lsb change around major carry ( 0111...1111 to 1000...0000 ) digital feedthrough ? <10 ? nv-s analog crosstalk ? <10 ? nv-s electrical characteristics (continued) electrical specifications: unless otherwise indicated, v dd = 5v, v ss = 0v, v ref = 2.048v, output buffer gain (g) = 2x, r l = 5 k ? to gnd, c l = 100 pf, t a = -40 to +85c. typical values are at +25c. parameters sym min typ max units conditions note 1: guaranteed monotonic by design over all codes. 2: this parameter is ensured by design, and not 100% tested. ? 2010-2015 microchip technology inc. ds20002249b-page 5 mcp4802/4812/4822 electrical characteristic with extended temperature electrical specifications: unless otherwise indicated, v dd = 5v, v ss = 0v, v ref = 2.048v, output buffer gain (g) = 2x, r l = 5 k ? to gnd, c l = 100 pf. typical values are at +125c by characterization or simulation. parameters sym min typ max units conditions power requirements input voltage v dd 2.7 ? 5.5 v input current input curren i dd ? 440 ? a all digital inputs are grounded, all analog outputs (v out ) are unloaded. code = 0x000h. software shutdown current i shdn_sw ?5?a power-on reset threshold v por ?1.85? v dc accuracy mcp4802 resolution n 8 ? ? bits inl error inl ? 0.25 ? lsb dnl dnl ? 0.2 ? lsb note 1 mcp4812 resolution n 10 ? ? bits inl error inl ? 1 ? lsb dnl dnl ? 0.2 ? lsb note 1 mcp4822 resolution n 12 ? ? bits inl error inl ? 4 ? lsb dnl dnl ? 0.25 ? lsb note 1 offset error v os ? 0.02 ? % of fsr code = 0x000h offset error temperature coefficient v os /c ? -5 ? ppm/c +25c to +125c gain error g e ? -0.10 ? % of fsr code = 0xfffh, not including offset error gain error temperature coefficient ? g/c ? -3 ? ppm/c internal voltage reference (v ref ) internal reference voltage v ref ? 2.048 ? v v outa when g = 1x and code = 0xfffh temperature coefficient ( note 2 ) ? v ref /c ? 125 ? ppm/c -40c to 0c ? 0.25 ? lsb/c -40c to 0c ? 45 ? ppm/c 0c to +85c ? 0.09 ? lsb/c 0c to +85c output noise (v ref noise) e nref (0.1 ? 10 hz) ? 290 ? v p-p code = 0xfffh, g = 1x output noise density e nref (1 khz) ?1.2?v/ ? hz code = 0xfffh, g = 1x e nref (10 khz) ?1.0?v/ ? hz code = 0xfffh, g = 1x 1/f corner frequency f corner ? 400 ? hz note 1: guaranteed monotonic by design over all codes. 2: this parameter is ensured by design, and not 100% tested. mcp4802/4812/4822 ds20002249b-page 6 ? 2010-2015 microchip technology inc. output amplifier output swing v out ? 0.01 to v dd ? 0.04 ? v accuracy is better than 1 lsb for v out = 10 mv to (v dd ? 40 mv) phase margin pm ? 66 ? degree () c l = 400 pf, r l = ? slew rate sr ? 0.55 ? v/s short circuit current i sc ?17?ma settling time t settling ? 4.5 ? s within 1/2 lsb of final value from 1/4 to 3/4 full-scale range dynamic performance ( note 2 ) dac-to-dac crosstalk ? <10 ? nv-s major code transition glitch ? 45 ? nv-s 1 lsb change around major carry ( 0111...1111 to 1000...0000 ) digital feedthrough ? <10 ? nv-s analog crosstalk ? <10 ? nv-s ac characteristics (spi timing specifications) electrical specifications: unless otherwise indicated, v dd = 2.7v ? 5.5v, t a = -40 to +125c. typical values are at +25c. parameters sym min typ max units conditions schmitt trigger high-level input voltage (all digital input pins) v ih 0.7 v dd ??v schmitt trigger low-level input voltage (all digital input pins) v il ??0.2v dd v hysteresis of schmitt trigger inputs v hys ?0.05v dd ?v input leakage current i leakage -1 ? 1 ? al dac = cs = sdi = sck = v dd or v ss digital pin capacitance (all inputs/outputs) c in , c out ?10?pfv dd = 5.0v, t a = +25c, f clk = 1 mhz ( note 1 ) clock frequency f clk ??20mhzt a = +25c ( note 1 ) clock high time t hi 15 ? ? ns note 1 clock low time t lo 15 ? ? ns note 1 cs fall to first rising clk edge t cssr 40 ? ? ns applies only when cs falls with clk high. ( note 1 ) data input setup time t su 15 ? ? ns note 1 data input hold time t hd 10 ? ? ns note 1 sck rise to cs rise hold time t chs 15 ? ? ns note 1 note 1: this parameter is ensured by design and not 100% tested. electrical characteristic with extended temperature (continued) electrical specifications: unless otherwise indicated, v dd = 5v, v ss = 0v, v ref = 2.048v, output buffer gain (g) = 2x, r l = 5 k ? to gnd, c l = 100 pf. typical values are at +125c by characterization or simulation. parameters sym min typ max units conditions note 1: guaranteed monotonic by design over all codes. 2: this parameter is ensured by design, and not 100% tested. ? 2010-2015 microchip technology inc. ds20002249b-page 7 mcp4802/4812/4822 figure 1-1: spi input timing data. temperature characteristics cs high time t csh 15 ? ? ns note 1 ldac pulse width t ld 100 ? ? ns note 1 ldac setup time t ls 40 ? ? ns note 1 sck idle time before cs fall t idle 40 ? ? ns note 1 electrical specifications: unless otherwise indicated, v dd = +2.7v to +5.5v, v ss = gnd. parameters sym min typ max units conditions temperature ranges specified temperature range t a -40 ? +125 c operating temperature range t a -40 ? +125 c note 1 storage temperature range t a -65 ? +150 c thermal package resistances thermal resistance, 8l-msop ? ja ?211?c/w thermal resistance, 8l-pdip ? ja ?90?c/w thermal resistance, 8l-soic ? ja ?150?c/w note 1: the mcp4802/4812/4822 devices operate over this extended temperature range, but with reduced performance. operation in this range must not cause t j to exceed the maximum junction temperature of +150c. ac characteristics (spi timing specifications) electrical specifications: unless otherwise indicated, v dd = 2.7v ? 5.5v, t a = -40 to +125c. typical values are at +25c. parameters sym min typ max units conditions note 1: this parameter is ensured by design and not 100% tested. cs sck sdi ldac t cssr t hd t su t lo t csh t chs lsb in msb in t idle mode 1,1 mode 0,0 t hi t ld t ls mcp4802/4812/4822 ds20002249b-page 8 ? 2010-2015 microchip technology inc. notes: ? 2010-2015 microchip technology inc. ds20002249b-page 9 mcp4802/4812/4822 2.0 typical performance curves note: unless otherwise indicated, t a = +25c, v dd = 5v, v ss = 0v, v ref = 2.048v, gain = 2x, r l = 5 k ? , c l = 100 pf. figure 2-1: dnl vs. code (mcp4822). figure 2-2: dnl vs. code and temperature (mcp4822). figure 2-3: absolute dnl vs. temperature (mcp4822). figure 2-4: inl vs. code and temperature (mcp4822). figure 2-5: absolute inl vs. temperature (mcp4822). figure 2-6: inl vs. code (mcp4822). note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. the performance characteristics listed herein are not tested or guaranteed. in some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0 1024 2048 3072 4096 code (decimal) dnl (lsb) -0.2 -0.1 0 0.1 0.2 0 1024 2048 3072 4096 code (decimal) dnl (lsb) 125c 85c 25c 0.075 0.0752 0.0754 0.0756 0.0758 0.076 0.0762 0.0764 0.0766 -40-20 0 20406080100120 ambient temperature (oc) absolute dnl (lsb) note: single device graph for illustration of 64 code effect. -5 -4 -3 -2 -1 0 1 2 3 4 5 0 1024 2048 3072 4096 code (decimal) inl (lsb) 125c 85 25 ambient temperature 0 0.5 1 1.5 2 2.5 -40 -20 0 20 40 60 80 100 120 ambient temperature (oc) absolute inl (lsb) -6 -4 -2 0 2 0 1024 2048 3072 4096 code (decimal) inl (lsb) mcp4802/4812/4822 ds20002249b-page 10 ? 2010-2015 microchip technology inc. note: unless otherwise indicated, t a = +25c, v dd = 5v, v ss = 0v, v ref = 2.048v, gain = 2x, r l = 5 k ? , c l = 100 pf. figure 2-7: dnl vs. code and temperature (mcp4812). figure 2-8: inl vs. code and temperature (mcp4812). figure 2-9: dnl vs. code and temperature (mcp4802). figure 2-10: inl vs. code and temperature (mcp4802). figure 2-11: full-scale v outa vs. ambient temperature and v dd . gain = 1x. figure 2-12: full-scale v outa vs. ambient temperature and v dd . gain = 2x. -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0 128 256 384 512 640 768 896 1024 code dnl (lsb) - 40 o c +25 o c to +125 o c -3 -2.5 -2 -1.5 -1 -0.5 0 0.5 1 1.5 0 128 256 384 512 640 768 896 1024 code inl (lsb) 25 o c 85 o c 125 o c - 40 o c -0.15 -0.1 -0.05 0 0.05 0.1 0.15 0 32 64 96 128 160 192 224 256 code dnl (lsb) 34 temperature: - 40 o c to +125 o c -0.3 -0.2 -0.1 0 0.1 0.2 0.3 0.4 0.5 0.6 0 326496128160192224256 code inl (lsb) - 40 o c 25 o c 85 o c 125 o c 2.040 2.041 2.042 2.043 2.044 2.045 2.046 2.047 2.048 2.049 2.050 -40 -20 0 20 40 60 80 100 120 ambient temperature (c) full scale v out (v) vdd: 4v vdd: 3v vdd: 2.7v 4.076 4.080 4.084 4.088 4.092 4.096 4.100 -40 -20 0 20 40 60 80 100 120 ambient temperature (c) full scale v out (v) vdd: 5.5v vdd: 5v ? 2010-2015 microchip technology inc. ds20002249b-page 11 mcp4802/4812/4822 note: unless otherwise indicated, t a = +25c, v dd = 5v, v ss = 0v, v ref = 2.048v, gain = 2x, r l = 5 k ? , c l = 100 pf. figure 2-13: output noise voltage density (v ref noise density) vs. frequency. gain = 1x. figure 2-14: output noise voltage (v ref noise voltage) vs. bandwidth. gain = 1x. figure 2-15: i dd vs. temperature and v dd . figure 2-16: i dd histogram (v dd = 2.7v). figure 2-17: i dd histogram (v dd = 5.0v). 1.e-07 1.e-06 1.e-05 1.e-04 1e-1 1e+0 1e+1 1e+2 1e+3 1e+4 1e+5 frequency (hz) output noise voltage density (v/ ? hz) 0.1 1 10 100 1k 10k 100k 100 10 1 0.1 1.e-05 1.e-04 1.e-03 1.e-02 1e+2 1e+3 1e+4 1e+5 1e+6 bandwidth (hz) output noise voltage (mv) 100 1k 10k 100k 1m e ni (in v rms ) 10.0 1.00 0.10 0.01 e ni (in v p-p ) maximum measurement time = 10s 180 200 220 240 260 280 300 320 340 -40-20 0 20406080100120 ambient temperature (c) i dd (a) v dd 5.5v 4.0v 5.0v 3.0v 2.7v 0 5 10 15 20 25 380 385 390 395 400 405 410 415 420 425 430 435 440 i dd (a) occurrence 0 2 4 6 8 10 12 14 16 18 20 22 385 390 395 400 405 410 415 420 425 430 435 i dd (a) occurrence mcp4802/4812/4822 ds20002249b-page 12 ? 2010-2015 microchip technology inc. note: unless otherwise indicated, t a = +25c, v dd = 5v, v ss = 0v, v ref = 2.048v, gain = 2x, r l = 5 k ? , c l = 100 pf. figure 2-18: software shutdown current vs. temperature and v dd . figure 2-19: offset error vs. temperature and v dd . figure 2-20: gain error vs. temperature and v dd . figure 2-21: v in high threshold vs. temperature and v dd . figure 2-22: v in low threshold vs. temperature and v dd . 1 1.5 2 2.5 3 3.5 4 -40-20 0 20406080100120 ambient temperature (oc) i shdn_sw (a) v dd 5.5v 4.0v 5.0v 3.0v 2.7v -0.03 -0.01 0.01 0.03 0.05 0.07 0.09 0.11 -40 -20 0 20 40 60 80 100 120 ambient temperature (oc) offset error (%) v dd 5.5v 4.0v 5.0v 3.0v 2.7v -0.5 -0.45 -0.4 -0.35 -0.3 -0.25 -0.2 -0.15 -0.1 -0.05 -40 -20 0 20 40 60 80 100 120 ambient temperature (oc) gain error (%) v dd 5.5v 4.0v 5.0v 3.0v 2.7v 1 1.5 2 2.5 3 3.5 4 -40-20 0 20406080100120 ambient temperature (oc) v in hi threshold (v) v dd 5.5v 4.0v 5.0v 3.0v 2.7v 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6 -40 -20 0 20 40 60 80 100 120 ambient temperature (oc) v in low threshold (v) v dd 5.5v 4.0v 5.0v 3.0v 2.7v ? 2010-2015 microchip technology inc. ds20002249b-page 13 mcp4802/4812/4822 note: unless otherwise indicated, t a = +25c, v dd = 5v, v ss = 0v, v ref = 2.048v, gain = 2x, r l = 5 k ? , c l = 100 pf. figure 2-23: input hysteresis vs. temperature and v dd . figure 2-24: v out high limit vs.temperature and v dd . figure 2-25: v out low limit vs. temperature and v dd . figure 2-26: i out high short vs. temperature and v dd . figure 2-27: i out vs. v out . gain = 2x. 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 -40-20 0 20406080100120 ambient temperature (oc) v in _ spi hysteresis (v) v dd 5.5v 4.0v 5.0v 3.0v 2.7v 0.015 0.017 0.019 0.021 0.023 0.025 0.027 0.029 0.031 0.033 0.035 -40-20 0 20406080100120 ambient temperature (oc) v out_hi limit (v dd -y)(v) v dd 4.0v 3.0v 2.7v 0.0010 0.0012 0.0014 0.0016 0.0018 0.0020 0.0022 0.0024 0.0026 0.0028 -40-20 0 20406080100120 ambient temperature (oc) v out_low limit (y-av ss )(v) v dd 5.5v 4.0v 5.0v 3.0v 2.7v 10 11 12 13 14 15 16 -40 -20 0 20 40 60 80 100 120 ambient temperature (oc) i out_hi_shorted (ma) v dd 5.5v 4 .0v 5.0v 3 .0v 2 .7v 0.0 1.0 2.0 3.0 4.0 5.0 6.0 0246810121416 i out (ma) v out (v) v ref = 4.096v output shorted to v ss output shorted to v dd mcp4802/4812/4822 ds20002249b-page 14 ? 2010-2015 microchip technology inc. note: unless otherwise indicated, t a = +25c, v dd = 5v, v ss = 0v, v ref = 2.048v, gain = 2x, r l = 5 k ? , c l = 100 pf. figure 2-28: v out rise time. figure 2-29: v out fall time. figure 2-30: v out rise time. figure 2-31: v out rise time. figure 2-32: v out rise time exit shutdown. figure 2-33: psrr vs. frequency. v out sck ldac time (1 s/div) v out sck ldac time (1 s/div) v out sck ldac time (1 s/div) time (1 s/div) v out ldac time (1 s/div) v out sck ldac ripple rejection (db) frequency (hz) ? 2010-2015 microchip technology inc. ds20002249b-page 15 mcp4802/4812/4822 3.0 pin descriptions the descriptions of the pins are listed in tab l e 3 - 1 . 3.1 supply voltage pins (v dd, v ss ) v dd is the positive supply voltage input pin. the input supply voltage is relative to v ss and can range from 2.7v to 5.5v. the power supply at the v dd pin should be as clean as possible for a good dac performance. it is recommended to use an appropriate bypass capacitor of about 0.1 f (ceramic) to ground. an additional 10 f capacitor (tantalum) in parallel is also recommended to further attenuate high-frequency noise present in application boards. v ss is the analog ground pin and the current return path of the device. the user must connect the v ss pin to a ground plane through a low-impedance connection. if an analog ground path is available in the application printed circuit board (pcb), it is highly recommended that the v ss pin be tied to the analog ground path or isolated within an analog ground plane of the circuit board. 3.2 chip select (cs ) cs is the chip select input pin, which requires an active-low to enable serial clock and data functions. 3.3 serial clock input (sck) sck is the spi compatible serial clock input pin. 3.4 serial data input (sdi) sdi is the spi compatible serial data input pin. 3.5 latch dac input (ldac ) ldac (latch dac synchronization input) pin is used to transfer the input latch registers to their corresponding dac registers (output latches, v out ). when this pin is low, both v outa and v outb are updated at the same time with their input register contents. this pin can be tied to low (v ss ) if the v out update is desired at the rising edge of the cs pin. this pin can be driven by an external control device such as an mcu i/o pin. 3.6 analog outputs (v outa , v outb ) v outa is the dac a output pin, and v outb is the dac b output pin. each output has its own output amplifier. the full-scale range of the dac output is from v ss to g* v ref , where g is the gain selection option (1x or 2x). the dac analog output cannot go higher than the supply voltage (v dd ). table 3-1: pin function tabl e for mcp4802/4812/4822 mcp4802/4812/4822 symbol description msop, pdip, soic 1v dd supply voltage input (2.7v to 5.5v) 2cs chip select input 3 sck serial clock input 4 sdi serial data input 5ldac synchronization input. this pin is used to transfer dac settings (input registers) to the output registers (v out ) 6v outb dac b output 7v ss ground reference point for all circuitry on the device 8v outa dac a output mcp4802/4812/4822 ds20002249b-page 16 ? 2010-2015 microchip technology inc. notes: ? 2010-2015 microchip technology inc. ds20002249b-page 17 mcp4802/4812/4822 4.0 general overview the mcp4802, mcp4812 and mcp4822 are dual voltage output 8-bit, 10-bit and 12-bit dac devices, respectively. these devices include rail-to-rail output amplifiers, internal voltage reference, shutdown and reset-management circuitry. the devices use an spi serial communication interface and operate with a sin- gle supply voltage from 2.7v to 5.5v. the dac input coding of these devices is straight binary. equation 4-1 shows the dac analog output voltage calculation. equation 4-1: analog output voltage (v out ) the ideal output range of each device is: ? mcp4802 (n = 8) (a) 0.0v to 255/256 * 2.048v when gain setting = 1x . (b) 0.0v to 255/256 * 4.096v when gain setting = 2x . ? mcp4812 (n = 10) (a) 0.0v to 1023/1024 * 2.048v when gain setting = 1x . (b) 0.0v to 1023/1024 * 4.096v when gain setting = 2x . ? mcp4822 (n = 12) (a) 0.0v to 4095/4096 * 2.048v when gain setting = 1x . (b) 0.0v to 4095/4096 * 4.096v when gain setting = 2x . 1 lsb is the ideal voltage difference between two successive codes. tab l e 4 - 1 illustrates the lsb calculation of each device. 4.0.1 inl accuracy integral non-linearity (inl) error for these devices is the maximum deviation between an actual code transi- tion point and its corresponding ideal transition point once offset and gain errors have been removed. the two end points method (from 0x000 to 0xfff) is used for the calculation. figure 4-1 shows the details. a positive inl error represents transition(s) later than ideal. a negative inl error represents transition(s) earlier than ideal. figure 4-1: example for inl error. note: see the output swing voltage specification in section 1.0 ?electrical characteris- tics? . v out 2.048v d ? n ?? 2 n ----------------------------------- g ? = where: 2.048v = internal voltage reference d n = dac input code g = gain selection =2 for mcp4802/4812/4822 ds20002249b-page 18 ? 2010-2015 microchip technology inc. 4.0.2 dnl accuracy a differential non-linearity (dnl) error is the measure of variations in code widths from the ideal code width. a dnl error of zero indicates that every code is exactly 1 lsb wide. figure 4-2: example for dnl error. 4.0.3 offset error an offset error is the deviation from zero voltage output when the digital input code is zero. 4.0.4 gain error a gain error is the deviation from the ideal output, v ref ? 1 lsb, excluding the effects of offset error. 4.1 circuit descriptions 4.1.1 output amplifiers the dac?s outputs are buffered with a low-power, precision cmos amplifier. this amplifier provides low offset voltage and low noise. the output stage enables the device to operate with output voltages close to the power supply rails. refer to section 1.0 ?electrical characteristics? for the analog output voltage range and load conditions. in addition to resistive load-driving capability, the amplifier will also drive high capacitive loads without oscillation. the amplifier?s strong outputs allow v out to be used as a programmable voltage reference in a system. 4.1.1.1 programmable gain block the rail-to-rail output amplifier has two configurable gain options: a gain of 1x ( ? 2010-2015 microchip technology inc. ds20002249b-page 19 mcp4802/4812/4822 4.1.3 power-on reset circuit the internal power-on reset (por) circuit monitors the power supply voltage (v dd ) during the device operation. the circuit also ensures that the dac powers up with high output impedance ( mcp4802/4812/4822 ds20002249b-page 20 ? 2010-2015 microchip technology inc. notes: ? 2010-2015 microchip technology inc. ds20002249b-page 21 mcp4802/4812/4822 5.0 serial interface 5.1 overview the mcp4802/4812/4822 devices are designed to interface directly with the serial peripheral interface (spi) port, available on many microcontrollers, and supports mode 0,0 and mode 1,1. commands and data are sent to the device via the sdi pin, with data being clocked-in on the rising edge of sck. the communications are unidirectional and, thus, data cannot be read out of the mcp4802/4812/4822 devices. the cs pin must be held low for the duration of a write command. the write command consists of 16 bits and is used to configure the dac?s control and data latches. register 5-1 to register 5-3 detail the input register that is used to configure and load the dac a and dac b registers for each device. figure 5-1 to figure 5-3 show the write command for each device. refer to figure 1-1 and spi timing specifications table for detailed input and output timing specifications for both mode 0,0 and mode 1,1 operation. 5.2 write command the write command is initiated by driving the cs pin low, followed by clocking the four configuration bits and the 12 data bits into the sdi pin on the rising edge of sck. the cs pin is then raised, causing the data to be latched into the selected dac?s input registers. the mcp4802/4812/4822 devices utilize a double- buffered latch structure to allow both dac a ?s and dac b ?s outputs to be synchronized with the ldac pin, if desired. by bringing down the ldac pin to a low state, the con- tents stored in the dac?s input registers are transferred into the dac?s output registers (v out ), and both v outa and v outb are updated at the same time. all writes to the mcp4802/4812/4822 devices are 16-bit words. any clocks after the first 16 th clock will be ignored. the most significant four bits are configuration bits. the remaining 12 bits are data bits. no data can be transferred into the device with cs high. the data transfer will only occur if 16 clocks have been transferred into the device. if the rising edge of cs occurs prior, shifting of data into the input registers will be aborted. mcp4802/4812/4822 ds20002249b-page 22 ? 2010-2015 microchip technology inc. register 5-1: write command regi ster for mcp4822 (12-bit dac) register 5-2: write command register for mcp4812 (10-bit dac) register 5-3: write command regist er for mcp4802 (8-bit dac) where: w-x w-x w-x w-0 w-x w-x w-x w-x w-x w-x w-x w-x w-x w-x w-x w-x a /b ? ga shdn d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 bit 15 bit 0 w-x w-x w-x w-0 w-x w-x w-x w-x w-x w-x w-x w-x w-x w-x w-x w-x a /b ? ga shdn d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 x x bit 15 bit 0 w-x w-x w-x w-0 w-x w-x w-x w-x w-x w-x w-x w-x w-x w-x w-x w-x a /b ? ga shdn d7 d6 d5 d4 d3 d2 d1 d0 x xxx bit 15 bit 0 bit 15 a /b: dac a or dac b selection bit 1 = write to dac b 0 = write to dac a bit 14 ? don?t care bit 13 ga : output gain selection bit 1 =1x (v out = v ref * d/4096) 0 =2x (v out = 2 * v ref * d/4096), where internal v ref = 2.048v. bit 12 shdn : output shutdown control bit 1 = active mode operation. v out is available. ? 0 = shutdown the selected dac channel. analog output is not available at the channel that was shut down. v out pin is connected to 500 k ??? typical) ? bit 11-0 d11:d0: dac input data bits. bit x is ignored. legend r = readable bit w = writable bit u = unimplemented bit, read as ?0? -n = value at por 1 = bit is set 0 = bit is cleared x = bit is unknown ? 2010-2015 microchip technology inc. ds20002249b-page 23 mcp4802/4812/4822 figure 5-1: write command for mcp4822 (12-bit dac). figure 5-2: write command for mcp4812 (10-bit dac). figure 5-3: write command for mcp4802 (8-bit dac). sdi sck cs 0 2 1 a /b ? ga shdn d11 d10 config bits 12 data bits ldac 3 4 d9 5 6 7 d8 d7 d6 8 9 10 12 d5 d4 d3 d2 d1 d0 11 13 14 15 v out (mode 1,1) (mode 0,0) sdi sck cs 0 2 1 a /b ? ga shdn d9 d8 config bits 12 data bits ldac 3 4 d7 5 6 7 d6 d5 d4 8 9 10 12 d3 d2 d1 d0 x x 11 13 14 15 v out (mode 1,1) (mode 0,0) note: x = ?don?t care? bits. sdi sck cs 0 2 1 a /b ? ga shdn config bits 12 data bits ldac 3 4 5 6 7 x d7 d6 8 9 10 12 d5 d4 d3 d2 d1 d0 11 13 14 15 v out (mode 1,1) (mode 0,0) xx x note: x = ?don?t care? bits. mcp4802/4812/4822 ds20002249b-page 24 ? 2010-2015 microchip technology inc. notes: ? 2010-2015 microchip technology inc. ds20002249b-page 25 mcp4802/4812/4822 6.0 typical applications the mcp4802/4812/4822 family of devices are general purpose dacs for various applications where a precision operation with low-power and internal voltage reference is required. applications generally suited for the devices are: ? set point or offset trimming ? sensor calibration ? precision selectable voltage reference ? portable instrumentation (battery-powered) ? calibration of optical communication devices 6.1 digital interface the mcp4802/4812/4822 devices utilize a 3-wire synchronous serial protocol to transfer the dac?s setup and input codes from the digital devices. the serial protocol can be interfaced to spi or microwire peripherals that is common on many microcontroller units (mcus), including microchip?s pic ? mcus and dspic ? dscs. in addition to the three serial connections (cs , sck and sdi), the ldac signal synchronizes the two dac outputs. by bringing down the ldac pin to ?low?, all dac input codes and settings in the two dac input reg- isters are latched into their dac output registers at the same time. therefore, both dac a and dac b outputs are updated at the same time. figure 6-1 shows an example of the pin connections. note that the ldac pin can be tied low (v ss ) to reduce the required connections from four to three i/o pins. in this case, the dac output can be immediately updated when a valid 16 clock transmission has been received and the cs pin has been raised. 6.2 power supply considerations the typical application will require a bypass capacitor in order to filter out the noise in the power supply traces. the noise can be induced onto the power supply's traces from various events such as digital switching or as a result of changes on the dac's output. the bypass capacitor helps to minimize the effect of these noise sources. figure 6-1 illustrates an appropriate bypass strategy. in this example, two bypass capacitors are used in parallel: (a) 0.1 f (ceramic) and (b)10 f (tantalum). these capacitors should be placed as close to the device power pin (v dd ) as possible (within 4 mm). the power source supplying these devices should be as clean as possible. if the application circuit has separate digital and analog power supplies, v dd and v ss of the device should reside on the analog plane. 6.3 output noise considerations the voltage noise density (in v/ ? hz) is illustrated in figure 2-13 . this noise appears at v outx , and is primarily a result of the internal reference voltage. its 1/f corner (f corner ) is approximately 400 hz. figure 2-14 illustrates the voltage noise (in mv rms or mv p-p ). a small bypass capacitor on v outx is an effective method to produce a single-pole low-pass filter (lpf) that will reduce this noise. for instance, a bypass capacitor sized to produce a 1 khz lpf would result in an e nref of about 100 v rms . this would be necessary when trying to achieve the low dnl error performance (at g = 1) that the mcp4802/4812/4822 devices are capable of. the tested range for stability is .001f through 4.7 f. figure 6-1: typical connection diagram. 6.4 layout considerations inductively-coupled ac transients and digital switching noises can degrade the output signal integrity, and potentially reduce the device performance. careful board layout will minimize these effects and increase the signal-to-noise ratio (snr). bench testing has shown that a multi-layer board utilizing a low-inductance ground plane, isolated inputs and isolated outputs with proper decoupling, is critical for the best performance. particularly harsh environments may require shielding of critical signals. breadboards and wire-wrapped boards are not recommended if low noise is desired. v dd v dd v dd av ss av ss v ss v outa v outb pic ? microcontroller v outa v outb sdi sdi cs 1 sdo sck ldac cs 0 1f 1f mcp48x2 mcp48x2 c1 = 10 f c2 = 0.1 f c1 c2 c2 c1 c1 c2 mcp4802/4812/4822 ds20002249b-page 26 ? 2010-2015 microchip technology inc. 6.5 single-supply operation the mcp4802/4812/4822 family of devices are rail-to- rail voltage output dac devices designed to operate with a v dd range of 2.7v to 5.5v. its output amplifier is robust enough to drive small-signal loads directly. therefore, it does not require any external output buffer for most applications. 6.5.1 dc set point or calibration a common application for the devices is a digitally- controlled set point and/or calibration of variable parameters, such as sensor offset or slope. for example, the mcp4822 provides 4096 output steps. if g = 1 is selected, the internal 2.048v v ref would produce 500 v of resolution. if g = 2 is selected, the internal 2.048 v ref would produce 1 mv of resolution. 6.5.1.1 decreasing output step size if the application is calibrating the bias voltage of a diode or transistor, a bias voltage range of 0.8v may be desired with about 200 v resolution per step. two common methods to achieve a 0.8v range are to either reduce v ref to 0.82v (using the mcp49xx family device that uses external reference) or use a voltage divider on the dac?s output. using a v ref is an option if the v ref is available with the desired output voltage range. however, occasionally, when using a low-voltage v ref , the noise floor causes snr error that is intolerable. using a voltage divider method is another option and provides some advantages when v ref needs to be very low or when the desired output voltage is not available. in this case, a larger value v ref is used while two resistors scale the output range down to the precise desired level. example 6-1 illustrates this concept. note that the bypass capacitor on the output of the voltage divider plays a critical function in attenuating the output noise of the dac and the induced noise from the environ- ment. example 6-1: example circuit of se t point or threshold calibration v dd spi 3-wire v trip r 1 r 2 0.1 f comparator v out 2.048 g d n 2 n ------ ?? = v cc + v cc ? v out v trip v out r 2 r 1 r 2 + -------------------- ?? ?? ?? = v dd r sense dac (a) single output dac: mcp4801 mcp4811 mcp4821 (b) dual output dac: mcp4802 mcp4812 mcp4822 g = gain selection (1x or 2x) d n = digital value of dac (0-255) for mcp4801/mcp4802 = digital value of dac (0-1023) for mcp4811/mcp4812 = digital value of dac (0-4095) for mcp4821/mcp4822 n = dac bit resolution ? 2010-2015 microchip technology inc. ds20002249b-page 27 mcp4802/4812/4822 6.5.1.2 building a ?window? dac when calibrating a set point or threshold of a sensor, typically only a small portion of the dac output range is utilized. if the lsb size is adequate enough to meet the application?s accuracy needs, the unused range is sacrificed without consequences. if greater accuracy is needed, then the output range will need to be reduced to increase the resolution around the desired threshold. if the threshold is not near v ref , 2v ref or v ss , then creating a ?window? around the threshold has several advantages. one simple method to create this ?window? is to use a voltage divider network with a pull- up and pull-down resistor. example 6-2 shows this concept. example 6-2: single-supply ?window? dac dac v dd spi 3-wire v trip r 1 r 2 0.1 f comparator r 3 v cc- v cc+ v cc+ v cc- v out r 23 r 2 r 3 r 2 r 3 + ------------------ - = v 23 v cc+ r 2 ?? v cc- r 3 ?? + r 2 r 3 + ------------------------------------------------------ = v trip v out r 23 v 23 r 1 + r 1 r 23 + -------------------------------------------- - = r 1 r 23 v 23 v out v o thevenin equivalent r sense v out 2.048 g d n 2 n ------ ?? = (a) single output dac: mcp4801 mcp4811 mcp4821 (b) dual output dac: mcp4802 mcp4812 mcp4822 g = gain selection (1x or 2x) d n = digital value of dac (0-255) for mcp4801/mcp4802 = digital value of dac (0-1023) for mcp4811/mcp4812 = digital value of dac (0-4095) for mcp4821/mcp4822 n = dac bit resolution mcp4802/4812/4822 ds20002249b-page 28 ? 2010-2015 microchip technology inc. 6.6 bipolar operation bipolar operation is achievable using the mcp4802/4812/4822 family of devices by utilizing an external operational amplifier (op amp). this configuration is desirable due to the wide variety and availability of op amps. this allows a general purpose dac, with its cost and availability advantages, to meet almost any desired output voltage range, power and noise performance. example 6-3 illustrates a simple bipolar voltage source configuration. r 1 and r 2 allow the gain to be selected, while r 3 and r 4 shift the dac's output to a selected offset. note that r4 can be tied to v dd , instead of v ss , if a higher offset is desired. also note that a pull-up to v dd could be used instead of r 4, or in addition to r 4 , if a higher offset is desired. example 6-3: digitally-contr olled bipolar voltage source 6.6.1 design example: design a bipolar dac using example 6-3 with 12-bit mcp4822 or mcp4821 an output step magnitude of 1 mv, with an output range of 2.05v, is desired for a particular application. step 1: calculate the range: +2.05v ? (-2.05v) = 4.1v. step 2: calculate the resolution needed: 4.1v/1 mv = 4100 since 2 12 = 4096, 12-bit resolution is desired. step 3: the amplifier gain (r 2 /r 1 ), multiplied by full- scale v out (4.096v), must be equal to the desired minimum output to achieve bipolar operation. since any gain can be realized by choosing resistor values (r 1 +r 2 ), the v ref value must be selected first. if a v ref of 4.096v is used (g=2), solve for the amplifier?s gain by setting the dac to 0, knowing that the output needs to be -2.05v. the equation can be simplified to: step 4: next, solve for r 3 and r 4 by setting the dac to 4096, knowing that the output needs to be +2.05v. dac v dd v dd spi 3-wire v out r 3 r 4 r 2 r 1 v in + 0.1 f v cc + v cc ? v in+ v out r 4 r 3 r 4 + -------------------- = v o v o v in+ 1 r 2 r 1 ----- - + ?? ?? v dd r 2 r 1 ----- - ?? ?? ? = v out 2.048 g d n 2 n ------ ?? = (a) single output dac: mcp4801 mcp4811 mcp4821 (b) dual output dac: mcp4802 mcp4812 mcp4822 g = gain selection (1x or 2x) d n = digital value of dac (0-255) for mcp4801/mcp4802 = digital value of dac (0-1023) for mcp4811/mcp4812 = digital value of dac (0-4095) for mcp4821/mcp4822 n = dac bit resolution r 2 ? r 1 -------- - 2.05 ? 4.096v ---------------- - = if r 1 = 20 k ? and r 2 = 10 k ? , the gain will be 0.5. r 2 r 1 ----- - 1 2 -- - = r 4 r 3 r 4 + ?? ----------------------- - 2.05v 0.5 4.096v ? ?? + 1.5 4.096v ? ------------------------------------------------------- 2 3 -- - == if r 4 = 20 k ? , then r 3 = 10 k ? ? 2010-2015 microchip technology inc. ds20002249b-page 29 mcp4802/4812/4822 6.7 selectable gain and offset bipolar voltage output using a dual output dac in some applications, precision digital control of the output range is desirable. example 6-4 illustrates how to use the mcp4802/4812/4822 family of devices to achieve this in a bipolar or single-supply application. this circuit is typically used for linearizing a sensor whose slope and offset varies. the equation to design a bipolar ?window? dac would be utilized if r 3 , r 4 and r 5 are populated. example 6-4: bipolar voltage source with selectable gain and offset v dd r 3 r 4 r 2 v o dac a v dd r 1 (dac a for gain adjust) (dac b for offset adjust) spi 3 r 5 v cc + thevenin bipolar ?window? dac using r 4 and r 5 0.1 f v cc ? v cc + v cc ? v outa v outb v in+ v outb r 4 v cc- r 3 + r 3 r 4 + ------------------------------------------------ - = v o v in+ 1 r 2 r 1 ----- - + ?? ?? v outa r 2 r 1 ----- - ?? ?? ? = equivalent v 45 v cc+ r 4 v cc- r 5 + r 4 r 5 + -------------------------------------------- - =r 45 r 4 r 5 r 4 r 5 + ------------------- = v in+ v outb r 45 v 45 r 3 + r 3 r 45 + ----------------------------------------------- - =v o v in+ 1 r 2 r 1 ----- - + ?? ?? v outa r 2 r 1 ----- - ?? ?? ? = offset adjust gain adjust offset adjust gain adjust dac b v outa 2.048 g a d n 2 n ------ ?? = v outb 2.048 g b d n 2 n ------ ?? = v in + dual output dac: mcp4802 mcp4812 mcp4822 g = gain selection (1x or 2x) n = dac bit resolution d a , d b = digital value of dac (0-255) for mcp4802 = digital value of dac (0-1023) for mcp4812 = digital value of dac (0-4095) for mcp4822 mcp4802/4812/4822 ds20002249b-page 30 ? 2010-2015 microchip technology inc. 6.8 designing a double-precision dac using a dual dac example 6-5 illustrates how to design a single-supply voltage output capable of up to 24-bit resolution from a dual 12-bit dac (mcp4822). this design is simply a voltage divider with a buffered output. as an example, if an application similar to the one developed in section 6.6.1 ?design example: design a bipolar dac using example 6-3 with 12- bit mcp4822 or mcp4821? required a resolution of 1 v instead of 1 mv, and a range of 0v to 4.1v, then 12-bit resolution would not be adequate. step 1: calculate the resolution needed: 4.1v/1 v = 4.1 x 10 6 . since 2 22 =4.2x10 6 , 22-bit resolution is desired. since dnl = 0.75 lsb, this design can be done with the 12-bit mcp4822 dac. step 2: since dac b ?s v outb has a resolution of 1 mv, its output only needs to be ?pulled? 1/1000 to meet the 1 v target. dividing v outa by 1000 would allow the application to compensate for dac b ?s dnl error. step 3: if r 2 is 100 ? , then r 1 needs to be 100 k ? . step 4: the resulting transfer function is shown in the equation of example 6-5 . example 6-5: simple, double-precision dac with mcp4822 v dd r 2 v o v dd r 1 (dac a for fine adjustment) (dac b for course adjustment) spi 3-wire r 1 >> r 2 v o v outa r 2 v outb r 1 + r 1 r 2 + ------------------------------------------------------ = 0.1 f v cc + v cc ? v outa v outb v outa 2.048 g a d a 2 12 ------- ?? = v outb 2.048 g b d b 2 12 ------- ?? = mcp4822 mcp4822 g x = gain selection (1x or 2x) d n = digital value of dac (0-4096) ? 2010-2015 microchip technology inc. ds20002249b-page 31 mcp4802/4812/4822 6.9 building programmable current source example 6-6 shows an example of building a programmable current source using a voltage follower. the current sensor (sensor resistor) is used to convert the dac voltage output into a digitally-selectable current source. adding the resistor network from example 6-2 would be advantageous in this application. the smaller r sense is, the less power dissipated across it. however, this also reduces the resolution that the current can be controlled with. the voltage divider, or ?window?, dac configuration would allow the range to be reduced, thus increasing resolution around the range of interest. when working with very small sensor voltages, plan on eliminating the amplifier?s offset error by storing the dac?s setting under known sensor conditions. example 6-6: digitally-controlled current source dac r sense i b load i l v dd spi 3-wire v cc + v cc ? v out i l v out r sense -------------- - ? ? 1 + ------------ - ? = i b i l ? ---- = ??? ? common-emitter current gain ?? where v dd or v ref (a) single output dac: mcp4801 mcp4811 mcp4821 (b) dual output dac: mcp4802 mcp4812 mcp4822 g = gain selection (1x or 2x) d n = digital value of dac (0-255) for mcp4801/mcp4802 = digital value of dac (0-1023) for mcp4811/mcp4812 = digital value of dac (0-4095) for mcp4821/mcp4822 n = dac bit resolution mcp4802/4812/4822 ds20002249b-page 32 ? 2010-2015 microchip technology inc. notes: ? 2010-2015 microchip technology inc. ds20002249b-page 33 mcp4802/4812/4822 7.0 development support 7.1 evaluation and demonstration boards the mixed signal pictail? demo board supports the mcp4802/4812/4822 family of devices. refer to www.microchip.com for further information on this product?s capabilities and availability. mcp4802/4812/4822 ds20002249b-page 34 ? 2010-2015 microchip technology inc. notes: ? 2010-2015 microchip technology inc. ds20002249b-page 35 mcp4802/4812/4822 8.0 packaging information 8.1 package marking information legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e 8-lead msop (3x3 mm) example 8-lead pdip (300 mil) example xxxxxxxx xxxxxnnn yyww 8-lead soic (3.90 mm) example nnn 4822e 009256 mcp4802 e/p 256 1009 3 e mcp4812e sn 1009 3 e 256 mcp4802/4812/4822 ds20002249b-page 36 ? 2010-2015 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging ? 2010-2015 microchip technology inc. ds20002249b-page 37 mcp4802/4812/4822 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging mcp4802/4812/4822 ds20002249b-page 38 ? 2010-2015 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging ? 2010-2015 microchip technology inc. ds20002249b-page 39 mcp4802/4812/4822 b a for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging note: microchip technology drawing no. c04-018d sheet 1 of 2 8-lead plastic dual in-line (p) - 300 mil body [pdip] eb e a a1 a2 l 8x b 8x b1 d e1 c c plane .010 c 12 n note 1 top view end view side view e mcp4802/4812/4822 ds20002249b-page 40 ? 2010-2015 microchip technology inc. microchip technology drawing no. c04-018d sheet 2 of 2 for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging note: 8-lead plastic dual in-line (p) - 300 mil body [pdip] units inches dimension limits min nom max number of pins n 8 pitch e .100 bsc top to seating plane a - - .210 molded package thickness a2 .115 .130 .195 base to seating plane a1 .015 shoulder to shoulder width e .290 .310 .325 molded package width e1 .240 .250 .280 overall length d .348 .365 .400 tip to seating plane l .115 .130 .150 lead thickness c .008 .010 .015 upper lead width b1 .040 .060 .070 lower lead width b .014 .018 .022 overall row spacing eb - - .430 bsc: basic dimension. theoretically exact value shown without tolerances. 3. 1. protrusions shall not exceed .010" per side. 2. 4. notes: -- dimensions d and e1 do not include mold flash or protrusions. mold flash or pin 1 visual index feature may vary, but must be located within the hatched area. significant characteristic dimensioning and tolerancing per asme y14.5m e datum a datum a e b e 2 b e 2 alternate lead design (vendor dependent) ? 2010-2015 microchip technology inc. ds20002249b-page 41 mcp4802/4812/4822 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging mcp4802/4812/4822 ds20002249b-page 42 ? 2010-2015 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging ? 2010-2015 microchip technology inc. ds20002249b-page 43 mcp4802/4812/4822 mcp4802/4812/4822 ds20002249b-page 44 ? 2010-2015 microchip technology inc. notes: ? 2010-2015 microchip technology inc. ds20002249b-page 45 mcp4802/4812/4822 appendix a: revision history revision b (may 2015) ? updated msop package marking drawing to correctly display the part?s orientation. revision a (april 2010) ? original release of this document. mcp4802/4812/4822 ds20002249b-page 46 ? 2010-2015 microchip technology inc. notes: ? 2010-2015 microchip technology inc. ds20002249b-page 47 mcp4802/4812/4822 product identification system to order or obtain information, e. g., on pricing or delivery, refer to the factory or the listed sales office . part no. x /xx package temperature range device device: mcp4802: dual 8-bit voltage output dac mcp4802t: dual 8-bit voltage output dac (tape and reel, msop and soic only) mcp4812: dual 10-bit voltage output dac mcp4812t: dual 10-bit voltage output dac (tape and reel, msop and soic only) mcp4822: dual 12-bit voltage output dac mcp4822t: dual 12-bit voltage output dac (tape and reel, msop and soic only) temperature range: e= -40 ? c to +125 ? c (extended) package: ms = 8-lead plastic micro small outline (msop) p = 8-lead plastic dual in-line (pdip) sn = 8-lead plastic small outline - narrow, 150 mil (soic) examples: a) mcp4802-e/ms: extended temperature, msop package. b) mcp4802t-e/ms: extended temperature, msop package, tape and reel. c) mcp4802-e/p: extended temperature, pdip package. d) mcp4802-e/sn: extended temperature, soic package. e) mcp4802t-e/sn: extended temperature, soic package, tape and reel. a) mcp4812-e/ms: extended temperature, msop package. b) mcp4812t-e/ms: extended temperature, msop package, tape and reel. c) mcp4812-e/p: extended temperature, pdip package. d) mcp4812-e/sn: extended temperature, soic package. e) mcp4812t-e/sn: extended temperature, soic package, tape and reel. a) mcp4822-e/ms: extended temperature, msop package. b) mcp4822t-e/ms: extended temperature, msop package, tape and reel. c) mcp4822-e/p: extended temperature, pdip package. d) mcp4822-e/sn: extended temperature, soic package. e) mcp4822t-e/sn: extended temperature, soic package, tape and reel. mcp4802/4812/4822 ds20002249b-page 48 ? 2010-2015 microchip technology inc. notes: ? 2010-2015 microchip technology inc. ds20002249b-page 49 information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, dspic, flashflex, flexpwr, jukeblox, k ee l oq , k ee l oq logo, kleer, lancheck, medialb, most, most logo, mplab, optolyzer, pic, picstart, pic 32 logo, righttouch, spynic, sst, sst logo, superflash and uni/o are registered trademarks of microchip tec hnology incorporated in the u.s.a. and other countries. the embedded control solutions company and mtouch are registered trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, bodycom, chipkit, chipkit logo, codeguard, dspicdem, dspicdem.net, ecan, in-circuit serial programming, icsp, inter-chip connectivity, kleernet, kleernet logo, miwi, mpasm, mpf, mplab certified logo, mplib, mplink, multitrak, netdetach, omniscient code generation, picdem, picdem.net, pickit, pictail, righttouch logo, real ice, sqi, serial quad i/o, total endurance, tsharc, usbcheck, varisense, viewspan, wiperlock, wireless dna, and zena are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of microchip technology incorporated in the u.s.a. silicon storage technology is a registered trademark of microchip technology inc. in other countries. gestic is a registered trademar ks of microchip technology germany ii gmbh & co. kg, a subsidiary of microchip technology inc., in other countries. all other trademarks mentioned herein are property of their respective companies. ? 2010-2015, microchip technology incorporated, printed in the u.s.a., all rights reserved. isbn: 978-1-63277-374-6 note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip produc ts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchip?s code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified. quality management s ystem certified by dnv == iso/ts 16949 == ds20002249b-page 50 ? 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